• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The wiring according to the present invention is made of an aluminum alloy film and a molybdenum-tungsten alloy film respectively formed on the upper part and the lower part about the film. In order to make such wiring, a first molybdenum-tungsten alloy film, an aluminum alloy film, and a second molybdenum-tungsten alloy film are sequentially stacked on the substrate. The molybdenum-tungsten alloy film has an etching ratio different for one etchant as the deposition temperature and the content of tungsten are changed. In particular, since the molybdenum-tungsten alloy shows an etching ratio similar to that of aluminum or an aluminum alloy having a low resistance to the aluminum etchant, the first molybdenum-tungsten alloy film is lower than the etching ratio of the aluminum alloy by controlling the deposition temperature and the tungsten content. When forming higher than the etching ratio of the aluminum alloy of a 2 molybdenum-tungsten alloy film, gentle diagonal etching is possible.
    公开号:KR19990031518A
    申请号:KR1019970052291
    申请日:1997-10-13
    公开日:1999-05-06
    发明作者:탁영재；홍문표
    申请人:윤종용；삼성전자 주식회사；
    IPC主号:
    专利说明:

    Liquid Crystal Display Using Wiring Using Molybdenum-Tungsten Alloy and Manufacturing Method Thereof
    The present invention relates to a liquid crystal display using a wiring using a molybdenum-tungsten alloy (MoW) and a method of manufacturing the same.
    Aluminum (Al) or chromium (Cr) is mainly used as a wiring of the liquid crystal display, that is, a gate line or a data line. Among them, chromium is mainly used as a data line because resistance is somewhat higher but ohmic contact between amorphous silicon and indium-tin oxide (ITO) is superior to that of aluminum.
    However, when the chromium film is patterned, a pattern in which the taper angle of the chromium film reaches almost 90 ° is formed due to strong adhesion to the photosensitive film. Accordingly, the protective film and the ITO film formed thereon also have an inclination angle close to the vertical, so that the films have a weak structure.
    In addition, since the chromium film is difficult to control the stress according to the deposition thickness, there is a limit in lowering the resistance of the wiring by forming a thicker thickness.
    SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-layered wiring which has a low resistance and shows similar etching ratios for each layer under the same etching conditions, thereby simplifying the manufacturing process of the display device and improving product characteristics.
    1 is a graph showing the etching ratio of the molybdenum-tungsten alloy film according to the tungsten content according to an embodiment of the present invention,
    2 is a graph showing the characteristics of the etching ratio according to the deposition temperature of the molybdenum-tungsten alloy film according to an embodiment of the present invention,
    3 is a layout view illustrating a method of manufacturing a thin film transistor substrate according to an exemplary embodiment of the present invention.
    4 is a cross-sectional view taken along the line IV-IV 'of FIG. 3,
    5A through 5D are cross-sectional views of the method of manufacturing the thin film transistor substrate illustrated in FIG. 4 according to a process sequence.
    The wiring according to the present invention can be tapered etched with a gentle inclination angle using the same etching conditions, and is a triple conductive film having a taper angle in the range of 20 to 70 °, or sequentially smaller etching toward the lower layer for the same etching conditions. It is formed of a triple conductive film having a ratio.
    Here, the conductive film located in the middle is made of a conductive material having a specific resistance of 15 μΩcm or less, and is made of a conductive material having a sequential etching ratio together with the intermediate conductive film according to the deposition temperature or the ratio of the composition to the etching solution.
    Here, the intermediate conductive film is an aluminum film or an aluminum alloy film, and the upper and lower conductive films are a molybdenum-tungsten alloy film made of tungsten, the remaining molybdenum and unavoidable impurities.
    When the etching condition is wet etching, the etchant is an etchant used to etch aluminum or an aluminum alloy, for example, CH 3 COOH / HNO 3 / H 3 PO 4 / H 2 O, wherein HNO 3 The concentration of is preferably 8 to 14%.
    The molybdenum-tungsten alloy film may be etched by the aluminum etchant, and the deposition rate may be increased as the deposition temperature is increased, or the taper etching may be performed because the etching ratio is increased as the content of tungsten is decreased.
    In this way, wiring having a gentle inclination angle can be obtained.
    In the method of manufacturing the wiring according to the present invention, a triple conductive film having a small etching ratio is sequentially stacked on the same substrate as the lower layer toward the lower layer. Next, the upper conductive film, the intermediate conductive film and the lower conductive film are simultaneously etched using the etching solution to complete the wiring.
    In order to make a wiring composed of three layers of conductive films made of an aluminum film and a molybdenum-tungsten alloy film, a lower molybdenum-tungsten alloy film, an aluminum or aluminum alloy film, and an upper molybdenum-alloy film are sequentially laminated on a transparent insulating substrate, and then a photosensitive film is coated. After patterning, the upper molybdenum-tungsten alloy film, the aluminum or aluminum alloy film, and the lower molybdenum-alloy film were wet-etched in sequence using an aluminum etchant using the patterned photoresist as a mask.
    As described above, a liquid crystal display device may be manufactured using such molybdenum-tungsten wiring.
    In the method for manufacturing a thin film transistor substrate for a liquid crystal display according to the present invention, a data line including a data line, a data pad, and a source / drain electrode is formed of a molybdenum-tungsten alloy, aluminum or an aluminum alloy composed of tungsten and the remaining molybdenum and unavoidable impurities; It is formed from a triple layer of molybdenum-tungsten alloy.
    Then, with reference to the accompanying drawings, a metal wire according to the present invention, a method for manufacturing the same, and an embodiment of the display device and the method using the same according to the present invention can be easily carried out by those skilled in the art. It is explained in detail as much as possible.
    As the wiring of the display device, a material such as aluminum, an aluminum alloy, molybdenum, copper, or the like having a low resistivity of 15 μΩcm or less is suitable. On the other hand, the wiring should have a pad for receiving a signal from the outside or transmitting a signal to the outside. The pad material should of course have a resistivity below a certain level, but moreover, it should not oxidize well and should not easily break in the manufacturing process. Aluminum and aluminum alloys have very low resistivity but are not suitable for pad materials. In contrast, materials such as chromium, tantalum, titanium, molybdenum and alloys thereof are suitable for pads but have a higher resistivity than aluminum. Therefore, when making the wiring, a metal having both characteristics is used, or a conductive film having a low resistance and a conductive film for a pad can be used as pads with low resistance.
    In the case where the wiring is a triple conductive film, the three conductive films are simultaneously etched under one etching condition but processed into a tapered shape having a gentle inclination angle. To this end, it is preferable to select a conductive film having a small etching ratio in order to have a taper angle in a range of less than 20 to 70 ° with respect to the same etching condition.
    In this process, the wiring according to the embodiment of the present invention is a molybdenum-tungsten alloy film consisting of tungsten and the remaining molybdenum and unavoidable impurities of the upper and lower conductive films, and the intermediate film between them is an aluminum film or an aluminum alloy film. Developed.
    First, the etching ratio characteristics of the molybdenum-tungsten alloy film to the aluminum etching solution will be described in detail.
    Figure 1 shows the etch rate characteristics of the molybdenum-tungsten alloy with respect to the aluminum etchant according to an embodiment of the present invention, the horizontal axis represents the tungsten content in atomic percentage and the vertical axis represents the thickness etched per unit time will be.
    In other words, the degree to which the molybdenum-tungsten alloy thin film is etched per unit time with respect to the etching liquid (HNO 3 : H 3 PO 4 : CH 3 COOH: H 2 O) of the aluminum alloy is expressed according to the content of tungsten (W). The etching ratio of aluminum is shown together.
    As can be seen from FIG. 1, when the tungsten content is 0%, the etch rate is very large in the range of 220 (Å / sec) or more, but the etching ratio is 40 to 100 (Å / sec) when the tungsten content is 10 to 15%. Appear in range. And it can be seen that the content of tungsten is represented by 10 to 40 (cc / sec) or less between 15 and 20%.
    On the other hand, aluminum having very low specific resistance or an alloy thereof has an etching ratio of about 60 to 80 (Å / sec) with respect to an aluminum etchant consisting of HNO 3 (8 to 14%): H 3 PO 4 : CH 3 COOH: H 2 O. Has Therefore, by controlling the content of tungsten, a molybdenum-tungsten alloy film having an etch ratio and a small etch ratio larger than the etching ratio of aluminum or its alloy, which is in the range of 60 to 80 (sec / sec), can be obtained. If it is formed on the upper and lower portions of the aluminum film or the aluminum alloy film, it is possible to etch at a time with an aluminum etchant and obtain a wiring having a tapered shape.
    FIG. 2 is a graph illustrating an etching ratio of molybdenum-tungsten alloy according to deposition temperature with respect to an aluminum etching solution according to an embodiment of the present invention, in which the horizontal axis represents the deposition temperature and the vertical axis is the thin film etched per unit time for the aluminum etchant. The thickness is shown.
    That is, the molybdenum-tungsten alloy thin film deposited at different temperatures shows the degree of etching per unit time with respect to the etching liquid (HNO 3 : H 3 PO 4 : CH 3 COOH: H 2 O) of the aluminum alloy. Here, a molybdenum-tungsten alloy thin film having a content of tungsten of about 10% was deposited.
    As can be seen in Figure 2, when the deposition temperature is 20 ℃ etching rate of the molybdenum-tungsten alloy thin film is about 3,000 (Å / min), the etching rate of the thin film as the deposition temperature is increased in the range of 20 ~ 160 ℃ It can be seen that increases. The etch rate of the molybdenum-tungsten alloy thin film deposited at 160 ° C. is about 12,000 (μm / min).
    At this time, the etching ratio of aluminum or its alloy is about 3,600 to 4,800 (Å / min) with respect to the aluminum etchant consisting of HNO 3 (8 to 14%): H 3 PO 4 : CH 3 COOH: H 2 O as described above. appear. Therefore, by controlling the deposition temperature of the molybdenum-tungsten alloy thin film, it is possible to obtain a molybdenum-tungsten alloy film having an etching ratio larger and smaller than that of aluminum or its alloy. If it is formed on the upper and lower portions of the aluminum film or the aluminum alloy film, it is possible to etch at a time with an aluminum etchant and obtain a wiring having a tapered shape.
    Such a wiring may be used as a gate line for applying a scan signal or a data line for applying a data signal in the display device.
    Next, a substrate for a liquid crystal display device using the molybdenum-tungsten alloy film / aluminum alloy film / molybdenum-tungsten alloy film triple film wiring and a manufacturing method thereof will be described in detail.
    First, the structure of a thin film transistor substrate will be described with reference to FIGS. 3 and 4. Here, FIG. 4 is sectional drawing of the IV-IV 'line | wire in FIG.
    A gate pattern including a gate line 200, a branch of the gate electrode 210, and a gate pad 220 formed at an end of the gate line 200 is formed on the substrate 100.
    A gate insulating layer 300 is formed on the gate patterns 200, 210, and 220, and the gate insulating layer 300 has a contact hole 720 exposing the gate pad 220. On the gate insulating layer 300 on the gate electrode 210, an amorphous silicon layer 400 and amorphous silicon layers 510 and 520 highly doped with n + impurities are formed on both sides of the gate electrode 210. .
    A data line 600 is also vertically formed on the gate insulating layer 300, and a data pad 630 is formed at one end thereof to transmit an image signal from the outside. A source electrode 610, which is a branch of the data line 600, is formed on one doped amorphous silicon layer 510, and a drain electrode is formed on the doped amorphous silicon layer 520 opposite to the source electrode 610. 620 is formed. Here, the data patterns including the data line 600, the source and drain electrodes 610 and 620, and the data pad 630 are all upper and lower layers of the aluminum layer or the aluminum alloy layers 611, 621, and 631. Molybdenum-tungsten alloy films (612, 622, 632: 613, 623, 633).
    A passivation layer 700 is formed on the data patterns 600, 610, 620, and 630 and the amorphous silicon layer 500 not covered by the data pattern, and the passivation layer 700 has upper and drain portions of the gate pad 220. Contact holes 720, 710, and 730 exposing the upper molybdenum-tungsten alloy films 622 and 632 of the electrode 620 and the data pad 630 are formed, respectively.
    Lastly, the passivation layer 700 is connected to the drain electrode 620 through the contact hole 710, and the pixel electrode 800 made of ITO is formed, and the gate pad 220 exposed through the contact hole 720 is formed. ) Is connected to the data pad 630 through the ITO electrode 810 for the gate pad and the contact hole 730 to transmit a signal from the outside to the gate line 200, and transmits a signal from the outside to the data line 600. A data pad ITO electrode 820 is formed.
    Next, a method of manufacturing the thin film transistor substrate having the structure shown in FIGS. 3 and 4 will be described with reference to FIGS. 5A to 5D. The manufacturing method proposed in this embodiment is a manufacturing method using five masks.
    As shown in FIG. 5A, an aluminum alloy film made of aluminum and neodymium (Nd) is laminated on a transparent insulating substrate 100 with a thickness of 1,000 to 3,000 kPa, and photo-etched using a first mask to form a gate line 200, A gate pattern including the gate electrode 210 and the gate pad 220 is formed.
    As shown in FIG. 5B, the gate insulating layer 300 made of silicon nitride, the amorphous silicon layer 400, and the amorphous silicon layer 500 heavily doped with N-type impurities are 3,000 to 5,000 kPa and 1,000 to 3,000 thick. After stacking in a thickness of 200 μm and 200 μm to 1,000 μm, the doped amorphous silicon layer 500 and the amorphous silicon layer 400 are photo-etched using a second mask.
    As shown in FIG. 5C, the lower molybdenum-tungsten alloy film, the aluminum or aluminum alloy film, and the upper molybdenum-tungsten alloy film are sequentially stacked and wet-etched using a third mask to wet the data line 600 and the source electrode ( A data pattern including a 610, a drain electrode 620, and a data pad 630 is formed.
    Here, the etchant used for wet etching is an aluminum etchant consisting of HNO 3 (8-14%): H 3 PO 4 : CH 3 COOH: H 2 O, and the molybdenum-tungsten alloy film (613, 623 and 633 are formed by adjusting the deposition temperature or the composition ratio of tungsten to have an etching rate slower than that of the upper molybdenum-tungsten alloy films 612, 622, and 632. In addition, the upper molybdenum-tungsten alloy films 612, 622, and 632, the aluminum alloy films 611, 621, and 631, and the lower molybdenum-tungsten alloy films 613, 623, and 633 have sequential etching ratios with respect to the aluminum etchant. To form.
    At this time, as mentioned above, since the etching ratio of the aluminum alloy film 611, 621, 631 to the aluminum etching solution has an etching ratio of about 60 ~ 80 Å / sec, the lower layer when the tungsten content is 10 at% The molybdenum-tungsten alloy films 613, 623, and 633 are preferably deposited in the range of 50 to 150 DEG C or lower, and the upper molybdenum-tungsten alloy films 612, 622, and 632 are deposited in the range of 150 DEG C or higher. On the other hand, the tungsten content of the lower molybdenum-tungsten alloy films 613, 623, and 633 is 10 at% or less, and the tungsten content of the upper molybdenum-tungsten alloy films 612, 622, and 632 is 10 at% or more. desirable.
    The upper and lower molybdenum-tungsten alloy films 612, 622, and 632: 613, 623, and 633 have a thickness in the range of about 400 to about 1,500 mm, and the thickness of the aluminum alloy films 611, 621, and 631 is about 1,500 to It is preferable to form in the range of about 4,000 Hz. More preferably, it forms in the range of about 400-600 Hz and 1,800-2,500 Hz, respectively.
    Subsequently, the exposed doped amorphous silicon layer 500 is dry etched using the data patterns 600, 610, 620, and 630 as a mask to be separated on both sides of the gate electrode 210, and both doped amorphous silicon layers are used. The amorphous silicon layer 400 between 510 and 520 is exposed.
    As shown in FIG. 5D, after the protective film 700 is laminated to a thickness of 2,000 to 5,000 μs, the drain electrode 620 and the data pad 630 are photo-etched with the insulating film 300 using a fourth mask. The upper molybdenum-tungsten alloy films 622 and 632 and the contact holes 710, 730, 720, which expose the upper portion of the gate pad 220 are formed.
    Finally, as shown in FIG. 4, ITO is laminated to a thickness of 300 to 1,500 Å and dry etched to be connected to the drain electrode 620 and the data pad 630 through the contact holes 710 and 730, respectively. An ITO pattern including the pixel electrode 800, the ITO electrode 820 for the data pad, and the gate pad ITO electrode 810 connected to the gate pad 220 through the contact hole 620 is formed using a fifth mask. Form.
    As described above, the data pattern including the molybdenum-tungsten alloy film and the triple film of the aluminum film or the aluminum alloy film has a gentle slope to reduce defects, and the etching process is simple since the etching process is possible with aluminum etchant. The upper and lower molybdenum-tungsten alloy films have a small contact resistance with the transparent electrode and the amorphous silicon layer, respectively, thereby improving the performance of the liquid crystal display device. In addition, since the three-layer wiring can form a thick wiring, it is suitable as a signal line of a high-definition large display device.
    权利要求:
    Claims (27)
    [1" claim-type="Currently amended] Stacking a conductive film on the transparent insulating substrate,
    Photo-etching the conductive layer to form a gate pattern including a gate line, a gate electrode, and a gate pad;
    Sequentially laminating a gate insulating layer and an amorphous silicon layer,
    Patterning the amorphous silicon layer,
    Stacking a first molybdenum-tungsten alloy film, an aluminum film or an aluminum alloy film, and a second molybdenum-tungsten alloy film on the substrate;
    Etching the second molybdenum-tungsten alloy film, the aluminum film or the aluminum alloy film, and the first molybdenum-tungsten alloy film under the same etching conditions to form a data pattern including a data line, a source electrode, a drain electrode, and a data pad;
    Laminating a protective film,
    Photo-etching the passivation layer together with the gate insulating layer to form a plurality of contact holes exposing the drain electrode, the gate pad, and the data pad, respectively;
    Laminating a transparent conductive layer, and
    Etching the transparent conductive layer to form a pixel electrode, a data pad transparent electrode and a gate pad transparent electrode respectively connected to the drain electrode, the gate pad and the data pad through the contact hole, respectively;
    Method of manufacturing a thin film transistor substrate for a liquid crystal display device comprising a.
    [2" claim-type="Currently amended] In claim 1,
    And the etching solution is an etching solution used to etch the aluminum film or the aluminum alloy film when the etching condition is a wet etching method.
    [3" claim-type="Currently amended] In claim 2,
    The etchant is CH 3 COOH / HNO 3 / H 3 PO 4 / H 2 O The manufacturing method of the thin film transistor substrate for a liquid crystal display device.
    [4" claim-type="Currently amended] In claim 3,
    And a thickness of the first and second molybdenum-tungsten alloy films is in the range of 400 to 1500 kPa.
    [5" claim-type="Currently amended] In claim 4,
    And a thickness of the first and second molybdenum-tungsten alloy films is in a range of 400 to 600 GPa.
    [6" claim-type="Currently amended] In claim 5,
    The thickness of the aluminum film or the aluminum alloy film is a manufacturing method of a thin film transistor substrate for a liquid crystal display device to be formed in the range of 1,500 ~ 4,000 Å.
    [7" claim-type="Currently amended] In claim 6,
    The thickness of the aluminum film or the aluminum alloy film is a manufacturing method of a thin film transistor substrate for a liquid crystal display device to be formed in the range of 1,800 ~ 2,500GHz.
    [8" claim-type="Currently amended] In claim 7,
    The etching ratio of the first molybdenum-tungsten alloy film and the second molybdenum-tungsten alloy film is smaller and larger than the etching ratio of the aluminum film or the aluminum alloy film with respect to the etching solution, respectively.
    [9" claim-type="Currently amended] In claim 8,
    And a deposition temperature of the first and second molybdenum-tungsten alloy films are different from each other.
    [10" claim-type="Currently amended] In claim 9,
    And a deposition temperature of the first molybdenum-tungsten alloy film is higher than a deposition temperature of the second molybdenum-tungsten alloy film.
    [11" claim-type="Currently amended] In claim 10,
    The first molybdenum-tungsten alloy film is deposited at a temperature of 50 to 150 ° C. or less when the tungsten content of the first and second molybdenum-tungsten alloy films is 10 at%.
    [12" claim-type="Currently amended] In claim 11,
    The second molybdenum-tungsten alloy film is increased at a temperature of 150 ° C. or more when the tungsten content of the first and second molybdenum-tungsten alloy films is 10 at%.
    [13" claim-type="Currently amended] In claim 8,
    And forming a tungsten composition ratio of the first and second molybdenum-tungsten alloy films differently.
    [14" claim-type="Currently amended] In claim 13,
    And the first molybdenum-tungsten alloy film has a lower tungsten composition ratio than the second molybdenum-tungsten alloy film.
    [15" claim-type="Currently amended] The method of claim 14,
    The tungsten content rate of the said 1st molybdenum-tungsten alloy film is 10 at% or less, The manufacturing method of the thin film transistor substrate for liquid crystal display devices.
    [16" claim-type="Currently amended] The method of claim 15,
    The tungsten content rate of the said 2nd molybdenum-tungsten alloy film is 10 at% or more, The manufacturing method of the thin film transistor substrate for liquid crystal display devices.
    [17" claim-type="Currently amended] A gate electrode formed on the transparent insulating substrate,
    A gate insulating layer covering the gate electrode,
    An amorphous silicon layer formed over the gate insulating film,
    A doped amorphous silicon layer formed on the amorphous silicon layer,
    A source / drain electrode formed on the doped amorphous silicon layer and comprising a triple conductive film of a first molybdenum-tungsten alloy film, an aluminum film or an aluminum alloy film, and a second molybdenum-tungsten alloy film;
    A thin film transistor substrate for a liquid crystal display device including a pixel electrode connected to the drain electrode.
    [18" claim-type="Currently amended] The method of claim 17,
    The thickness of the first and second molybdenum-tungsten alloy film ranges from 400 to 1,500 kW.
    [19" claim-type="Currently amended] The method of claim 18,
    The thickness of the first and second molybdenum-tungsten alloy film ranges from 400 to 600 kV.
    [20" claim-type="Currently amended] The method of claim 19,
    The thickness of the aluminum film or the aluminum alloy film is a thin film transistor substrate for a liquid crystal display device in the range of 1,500 ~ 4,000Å.
    [21" claim-type="Currently amended] The method of claim 20,
    The thickness of the aluminum film or the aluminum alloy film is a thin film transistor substrate for a liquid crystal display device in the range of 1,800 ~ 2,500Å.
    [22" claim-type="Currently amended] The method of claim 21,
    A thin film transistor substrate for a liquid crystal display device having a different deposition temperature of the first and second molybdenum-tungsten alloy films.
    [23" claim-type="Currently amended] The method of claim 22,
    And the first molybdenum-tungsten alloy film has a higher deposition temperature than the second molybdenum-tungsten alloy film.
    [24" claim-type="Currently amended] The method of claim 21,
    A thin film transistor substrate for a liquid crystal display device, wherein the tungsten composition ratios of the first and second molybdenum-tungsten alloy films are different from each other.
    [25" claim-type="Currently amended] The method of claim 24,
    The first molybdenum-tungsten alloy film has a lower tungsten composition ratio than the second molybdenum-tungsten alloy film.
    [26" claim-type="Currently amended] The method of claim 25,
    The tungsten content rate of the said 1st molybdenum-tungsten alloy film is 10 at% or less, The manufacturing method of the thin film transistor substrate for liquid crystal display devices.
    [27" claim-type="Currently amended] The method of claim 26,
    The tungsten content rate of the said 2nd molybdenum-tungsten alloy film is 10 at% or more, The manufacturing method of the thin film transistor substrate for liquid crystal display devices.
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    同族专利:
    公开号 | 公开日
    KR100476622B1|2005-08-23|
    US6130443A|2000-10-10|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1997-10-13|Application filed by 윤종용, 삼성전자 주식회사
    1997-10-13|Priority to KR1019970052291A
    1999-05-06|Publication of KR19990031518A
    2005-08-23|Application granted
    2005-08-23|Publication of KR100476622B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019970052291A|KR100476622B1|1997-10-13|1997-10-13|Liquid crystal display device using wiring with molybdenum-tungsten alloy and its manufacturing method|
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